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In electronics and especially synchronousdigital circuits, a clock signal (historically also known as logic beat^[1]) oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.

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A clock signal is produced by a clock generator. Although more complex arrangements are used, the most common clock signal is in the form of a square wave with a 50% duty cycle, usually with a fixed, constant frequency. Circuits using the clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle.

Digital circuits[edit]

Most integrated circuits (ICs) of sufficient complexity use a clock signal in order to synchronize different parts of the circuit, cycling at a rate slower than the worst-case internal propagation delays. In some cases, more than one clock cycle is required to perform a predictable action. As ICs become more complex, the problem of supplying accurate and synchronized clocks to all the circuits becomes increasingly difficult. The preeminent example of such complex chips is the microprocessor, the central component of modern computers, which relies on a clock from a crystal oscillator. The only exceptions are asynchronous circuits such as asynchronous CPUs.

A clock signal might also be gated, that is, combined with a controlling signal that enables or disables the clock signal for a certain part of a circuit. This technique is often used to save power by effectively shutting down portions of a digital circuit when they are not in use, but comes at a cost of increased complexity in timing analysis.

Single-phase clock[edit]

Most modern synchronous circuits use only a 'single phase clock' – in other words, all clock signals are (effectively) transmitted on 1 wire.

Two-phase clock[edit]

In synchronous circuits, a 'two-phase clock' refers to clock signals distributed on 2 wires, each with non-overlapping pulses. Traditionally one wire is called 'phase 1' or 'φ1', the other wire carries the 'phase 2' or 'φ2' signal.^[2]^[3]^[4]^[5] Because the two phases are guaranteed non-overlapping, gated latches rather than edge-triggered flip-flops can be used to store state information so long as the inputs to latches on one phase only depend on outputs from latches on the other phase. Since a gated latch uses only four gates versus six gates for an edge-triggered flip-flop, a two phase clock can lead to a design with a smaller overall gate count but usually at some penalty in design difficulty and performance.

MOS ICs typically used dual clock signals (a two-phase clock) in the 1970s. These were generated externally for both the 6800 and 8080 microprocessors.^[6] The next generation of microprocessors incorporated the clock generation on chip. The 8080 uses a 2 MHz clock but the processing throughput is similar to the 1 MHz 6800. The 8080 requires more clock cycles to execute a processor instruction. The 6800 has a minimum clock rate of 100 kHz and the 8080 has a minimum clock rate of 500 kHz. Higher speed versions of both microprocessors were released by 1976.^[7]

The 6501 requires an external 2-phase clock generator.The MOS Technology 6502 uses the same 2-phase logic internally, but also includes a two-phase clock generator on-chip, so it only needs a single phase clock input, simplifying system design.

4-phase clock[edit]

Some early integrated circuits use four-phase logic, requiring a four phase clock input consisting of four separate, non-overlapping clock signals.^[8]This was particularly common among early microprocessors such as the National SemiconductorIMP-16, Texas Instruments TMS9900, and the Western Digital WD16 chipset used in the DEC LSI-11.

Four phase clocks have only rarely been used in newer CMOS processors such as the DEC WRL MultiTitan microprocessor.^[9] and in Intrinsity's Fast14 technology. Most modern microprocessors and microcontrollers use a single-phase clock.

Clock multiplier[edit]

Many modern microcomputers use a 'clock multiplier' which multiplies a lower frequency external clock to the appropriate clock rate of the microprocessor. This allows the CPU to operate at a much higher frequency than the rest of the computer, which affords performance gains in situations where the CPU does not need to wait on an external factor (like memory or input/output).

Dynamic frequency change[edit]

The vast majority of digital devices do not require a clock at a fixed, constant frequency.As long as the minimum and maximum clock periods are respected, the time between clock edges can vary widely from one edge to the next and back again.Such digital devices work just as well with a clock generator that dynamically changes its frequency, such as spread-spectrum clock generation, dynamic frequency scaling, etc.Devices that use static logic do not even have a maximum clock period (or in other words, minimum clock frequency); such devices can be slowed and paused indefinitely, then resumed at full clock speed at any later time.

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Digital circuits[edit]

Single-phase clock[edit]

Two-phase clock[edit]

4-phase clock[edit]

Clock multiplier[edit]

Dynamic frequency change[edit]

Other circuits[edit]